The PCB design is in progress even if August is a holiday season in Italy. ACube Systems was able to engage an engineering firm available to work in August to develop the PCB based on the electrical schematics, a pretty difficult task because everyone is on holiday at this time in Italy.
In addition, Slimbook has provided us additional parts of the schematics useful for reviewing the connection of our motherboard design to the native Eclipse Expansion I/O Board. Resulting from these efforts, we can confirm our envisioned tentative schedule that set the delivery of the PCB design by the end of September 2020.
Interview with Riccardo Mottola, the main contributor to the ArcticFox web browser
In our PowerProgressCommunity association website we just published an interview with Riccardo Mottola, the most active developer contributing to the most advanced browser available for the PowerPC big endian platform
We have just published in our repo arcticfox 27.10.2(beta) compiled for PPC64
Freedesktop for Big Endian ported 350 package out of 470 to PPC64 big endian
Another step ahead on freedesktop-sdk on ppc64 big endian: libvpx and nss are gone. From 470 packages almost 350 are passed. Now the big challenge starts with ffmpeg, some sdl2 related component and mesa extension.
Suggest a Name for our PowerPC Notebook motherboard
Its time to give a name to our motherboard, we already have in our PPC forum few suggestions, please add yours.
Thanks to the donations already received, the work on the PCB design can move forward and we estimate it could be completed by the End of September 2020. The timing is somehow unfortunate, as August in Italy is time of vacation, nevertheless, we will do our best to avoid interruptions. The date of publication of the PCB design will heavily depend on the results of the internal review process once we receive the first draft, hopefully it will not take long. The design of the PCB is meant to fit inside the Slimbook Eclipse body.
As we were unable to reach the goal by July, we are forced to postpone the deadline of the current Donation Campaign (Phase 1A) to the 30th of August 2020.
The plan is to deliver the PCB design with the end of Phase 1A, and right after that start Phase 1B “Fast SI bus simulations” on the 1st of September with a goal of € 5000 (around $ 5600). As a consequence, there will be no interruption in the donation campaign, it will transparently fade from Phase 1A to Phase 1B seamlessly.
We kindly ask all followers, friends, and donors to concentrate their donations before the 30th August 2020, to ensure the end of Phase 1A to avoid an additional delay.
Our PPC64 Big Endian Patches
Flatpak binary is running on Debian 10 PPC64 Big Endian but need the Freedesktop layer to prepare the flatpak packages strating from hundreds of manifests.
After importing bootstrap on a native ppc64be, the build process stops on package https://github.com/google/boringssl.git it doesn’t have ppc64 support, “magic” debian repo solve a lot of problems related to dep…back on track on porting!
Once copied the bootstrap to target, rename bootstrap/powerpc64 to bootstrap/current Execute these commands to compile:
MintPPC running on the T2080RDB Devkit
We are in close contact with Jeroen, the creator of the Debian based MintPPC distro (see a post about the new 2020 version of MintPPC here). We have successfully tested it on our T2080RDB Devkit that has the same NXP T2080 cpu of our laptop project (64bit, 4 cores, 8 logical core, up to 1.8Ghz).
We very much like the work that our friends at Libre-SOC are currently doing. Our approach have multiple similarities as we both aim at supporting a similar effort in pushing Open Hardware further. Below some update from their team.
Libre-SOC ran its first “hello world” little-endian binary a few weeks ago. This shows us that Load, Store, Branch (and return) and many other POWER9 instructions are operational. With help from Florent of Enjoy-Digital.fr the next main task is to add Litex integration which will provide access to peripherals, both on FPGAs and in simulation. At the same time, Jean-Paul from Sorbonne University has been helping with the layout of the 180nm test ASIC
If anyone would like to assist we have funding thanks to NLNet under their Privacy and Enhanced Trust Programme http://nlnet.nl/PET
Updates on Schematics are being transposed to the PCB design
In February the designer analyzed the Pericom PI7C9X2G608GP PCIe Packet Switch with the direct support of Pericom staff. Now, the Pericom PCIe Packet Switch is fully tested and all the needed setup is completed, so the designer has completed the inclusion of all required information in the updated version of the schematics and is starting to unravel the PCB.
The designer has updated the SerDes connections following our suggestions taking into account the notes we have provided, so a new version of the schematics is expected soon.
Arctic-Fox 27.10.1 PPC64 in our Repo
The main contributor to Arctic-Fox – Riccardo Mottola – member of our Power Progress Community association – has released the new version 27.10.1+b0 that we have compiled and packaged in our Debian PPC64repo. Riccardo says: “Session Store, code greatly improved compared to past releases, performance improvements in both the html engine as well as a new build system imported from Firefox. This release is definitely a great improvement compared to 27.9.19 right at start”
Repository moved to our Power Progress Community GitLab group.
We have created a Gitlab group called Power Progress Community and we moved all our gitlab repositories under https://gitlab.com/power-progress-community. What is important to know is that all URLs have changed and any cloned repository must be rebased. If you have cloned our repositories you should update git remote origin.
We have modified the original scripts to compile for PPC64 Big Endian but so far, we still have to solve multiple errors leading before being able to generate a working binary. You can find our fork and ppc64 branch here https://github.com/robyinno/UnrealEngine/tree/4.23-ppc64 ( to access it you need to accept Epic Games EULA). We are building the source using both a Power9 virtual machine provided by Open OSU and OpenPower Foundation, as well as on our NXP T2080-RDB development kit using Debian PPC64 SID unstable. If you want to help us on fixing the compilation errors, you can start from our UnrealEnginePPC64 Wiki, please contact us.
As we stated in a previous article, we have already contracted ACube Systems and the PCB design work has started. This post is a first report about the work in progress in relation to the PCB design.
These days, the designer is analyzing the Pericom Switch with the direct support of Pericom personnel.
The Pericom PI7C9X2G608GP is a PCIE Gen 2 Switch that provides one upstream port supporting x4 or x1, and 4 or 5 downstream ports that support x1 operation. This chip has a Power Dissipation of 1.2 W.
In our mobo the PI7C9X2G608GP is essential as it allows to connect one 4x PCIe 2.0 controller of the NXP T2080 CPU with four 1x PCIe chips/cards: M.2 3G/LTE card , M.2 WiFi card, 1x Renesas USB3 Controller and 1x C-Media Audio chipset.
Four months have passed since we started our donation campaign aimed at the PCB design and we are now at around €6500 (27%) of the goal €24000 for the entire phase 1 of the design, and we must admit that the rate of donations is slower than what we had hoped for.
Phase 1 is subdivided in two subtasks:
1A) PCB Project € 19000
1B) Fast SI bus simulations €5000
In other words, we reached an encouraging 34% of what is required for subtask 1A.
As we really want to speed up as much as possible the activity, we decided to formally split phase 1, and not to wait to reach €24000 to start the design of the PCB.
To do so, we signed a contract with ACube Systems (company we rely on for the design) just for subtask 1A. Doing so gives the chance to start right now the PCB design. At the time of signing the contract, we paid €6000, the amount required by the designer to start working.
One of the reasons forcing us to speed up the planned activities, is linked to the availability of the Slimbook model “Eclipse” that will not last forever, very much like any other commercially available products such as the electronic components we selected during the electrical schematics design phase. In fact, the electrical schematics are customized for the pinouts of that specific Slimbook model, and the PCB design will be specifically shaped to fit in the Slimbook Eclipse chassis. Because of these constraints, we have to finish the PCB design (phase 1A), the fast SI bus simulations (phase 1B) and the prototypes (phase 2) around this summer.
We fixed the end of April 2020 as the time-limit for phase 1A, so we have 3 months left to raise the remaining €12500. As you may well understand this goal is quite ambitious, but it is necessary if we don’t want to risk to fail.