Thanks to the donations already received, the work on the PCB design can move forward and we estimate it could be completed by the End of September 2020. The timing is somehow unfortunate, as August in Italy is time of vacation, nevertheless, we will do our best to avoid interruptions. The date of publication of the PCB design will heavily depend on the results of the internal review process once we receive the first draft, hopefully it will not take long. The design of the PCB is meant to fit inside the Slimbook Eclipse body.
As we were unable to reach the goal by July, we are forced to postpone the deadline of the current Donation Campaign (Phase 1A) to the 30th of August 2020.
The plan is to deliver the PCB design with the end of Phase 1A, and right after that start Phase 1B “Fast SI bus simulations” on the 1st of September with a goal of € 5000 (around $ 5600). As a consequence, there will be no interruption in the donation campaign, it will transparently fade from Phase 1A to Phase 1B seamlessly.
We kindly ask all followers, friends, and donors to concentrate their donations before the 30th August 2020, to ensure the end of Phase 1A to avoid an additional delay.
Our PPC64 Big Endian Patches
Flatpak binary is running on Debian 10 PPC64 Big Endian but need the Freedesktop layer to prepare the flatpak packages strating from hundreds of manifests.
Freedesktop stripper now it’s patched for cross-endian check (ppc64 branch) . We thanks Flatpak team for the gentle collaboration and helpful guidelines.
After importing bootstrap on a native ppc64be, the build process stops on package https://github.com/google/boringssl.git it doesn’t have ppc64 support, “magic” debian repo solve a lot of problems related to dep…back on track on porting!
sudo apt-get install python3-grpcio libgirepository1.0-dev python3-cairo-dev libcairo2-dev gir1.2-ostree-1.0 python3-gi gyp node-gyp lzip locales-all
pip install BuildStream
pip install git+https://gitlab.com/buildstream/bst-external
pip install cython
pip install ostree
pip install PyGObject
pip install vext.giOnce copied the bootstrap to target, rename bootstrap/powerpc64 to bootstrap/current
Execute these commands to compile:
export XDG_CACHE_HOME=<path/to/build/dir>
make IMPORT_BOOTSTRAP=trueMintPPC running on the T2080RDB Devkit
We are in close contact with Jeroen, the creator of the Debian based MintPPC distro (see a post about the new 2020 version of MintPPC here). We have successfully tested it on our T2080RDB Devkit that has the same NXP T2080 cpu of our laptop project (64bit, 4 cores, 8 logical core, up to 1.8Ghz).
LibreSOC updates
We very much like the work that our friends at Libre-SOC are currently doing. Our approach have multiple similarities as we both aim at supporting a similar effort in pushing Open Hardware further.
Below some update from their team.
Libre-SOC ran its first “hello world” little-endian binary a few weeks ago. This shows us that Load, Store, Branch (and return) and many other POWER9 instructions are operational. With help from Florent of Enjoy-Digital.fr the next main task is to add Litex integration which will provide access to peripherals, both on FPGAs and in simulation. At the same time, Jean-Paul from Sorbonne University has been helping with the layout of the 180nm test ASIC
If anyone would like to assist we have funding thanks to NLNet under their Privacy and Enhanced Trust Programme http://nlnet.nl/PET
