The hardware designer who created our Powerboard Tyche worked between April and July on one of the three prototypes, focusing on fixing the board firmware. These fixes required a series of checks to determine if any additional adjustments were needed for the board itself, and a complete analysis of electronic signals was performed. This analysis was provided later in September. The same fixes were applied to the second prototype (we have three prototypes).

u-boot 2018.11 enabled AMD video cards

Additionally, Max Tretene from ACube Systems was hard at work on our NXP T2080-based DevKit and completed a newer version of U-Boot in May, which finally enabled graphical output on AMD Radeon video cards during booting. You can find the updated source code on our GitLab. Below you can see the new U-Boot in action booting up the NXP T2080-based DevKit.

Below is a photo showing the Powerboard Tyche during an electronic test session conducted last August.

In August, the hardware designer sent back two prototypes to our firmware engineer. ACube Systems purchased an oscilloscope to continue analyzing signals on the prototypes, since the oscilloscope previously used by the firmware engineer was on loan.

In September, signal analysis using the oscilloscopes began, comparing the NXP T2080-based DevKit and our Powerboard Tyche to identify differences. Many differences were found in the power-up sequences, so we asked the hardware designer to fix the CPLD program responsible for governing the signals.

Below is a picture of the expected power-up signals as explained in the T2080 Manual.

Below is picture showing the signals from the Powerboard Tyche last August, a picture extracted from the Test Report provided by the hardware designer.

As you can see above there is some difference of PORESET_B and HRESET_B between what was found during the hardware tests on pur board and what is expected in the NXP manuals.

In September, a new series of tests were performed. Below are two pictures from the oscilloscope showing the output of different attempts while reprogramming the CPLD of the Powerboard Tyche.

As we can see on the screenshot even the tension of 2,51 volt was wrong, as it should be not more than 2 volt.

During September and October, there were many reprogramming cycles of the CPLD. Each time, the hardware designer recompiled the HDL of our CPLD and sent it to our firmware engineer, who had two prototypes in hand. Reprogramming the prototypes was quite slow, as neither the hardware designer nor the firmware engineer were working full-time in our project. We sent one prototype back to the hardware designer, and by the end of October, he had completed the CPLD updates. At the end of this hard work the CPLD finally generates the expected power-up signals, reproducing the same signals generated during power-up of the NXP T2080-based DevKit.

The final version of the CPLD firmware (published on GitLab) modifies the behavior of the two signals PORESET (yellow) and HRESET. Indeed, the oscilloscope shows that the two signals now behave differently compared to previous versions.

By the end of October, the signals on the Powerboard Tyche finally looked correct (picture below)

As you can see the now the tension is correct, around 1,95v, in August was 2,51v

Unfortunately, the changes to the CPLD did not resolve the boot-up process of the entire board.

Strangely enough, during tests we found differences in the power-up behavior between two of the prototype boards: one in the hands of the firmware engineer (FE) and the other in the hands of the hardware designer (HE). Here are the three differences we found:

• On the HE board, the ASLEEP LED stays off if the SD card with U-Boot is inserted and lights up if it is not inserted.
• On the FE board, the ASLEEP LED always stays on, regardless of whether an SD card is inserted or not.
• On the HE board, the oscilloscope shows activity on the SD signals, while on the FE borrowed, there is no activity at all.

We are investigating the possible causes of this different behaviors, such as a potentially different patches. We have sent the third prototype, which was in the hands of Roberto Innocenti during the presentation in October-November 2023, back to the hardware designer to verify its behavior.

Differences were also found while performing the usual test with our JTAG debugger, where we encountered some unusual and strange characters in the output.

New Partners to reach the goal

Due to the significant latency and unreliability of the original hardware designer, we are now forced to find other partners to reach our goal of having the motherboard ready for production in 2025. We started the process of searching for a new company in August, and finally, in November, we found a new highly skilled Italian company for prototype production. This company has decades of experience and a new hardware designer with experience in PowerPC design, which is a great accomplishment for us since such expertise is becoming increasingly rare.

In the transition from one company to another, we are now facing some additional work because the current PCB design is based on Mentor Expedition software (a software now acquired by Siemens), while the new hardware designer uses the Orcad software. Fortunately, we have previously worked on such a task and have already attempted the conversion to Altium software. However, we will need to perform the conversion with greater care to ensure that all components are completely and correctly exported.

The past work on the mechanical aspects of the PCB to fit it into the Slimbook chassis was performed by a previous company that unfortunately generated some dimensioning errors in our existing prototypes therefore the new company has to fix also these problems.

Even if this new company was already known as it successfully worked with ACube System in the past, it was not previously selected for working on the laptop because of its somewhat higher cost. So at this point we are left with no choice but to entrust the job to them if we really want to find out what’s wrong with the board.

Required changes to the motherboard

We have already had the opportunity to explain the history of the board to the new company and to the new hardware designer and requested their investigation into the possible causes preventing the board from booting up. We agreed on a complete and in-depth analysis of the entire pre-boot process of the board. Based on their checks, we may need to implement further patches or introduce additional changes to the electronic design as a worst-case scenario.

The new hardware designer , obviously had other projects running before starting ours and will be able to start working on our board by January 2025.

In addition to potential electronic fixes, we have already planned some hardware changes as stated in a previous post (link). The goal is to make new prototypes with changes that will lower the overall cost and to do so, we will drop the SATA3 chipset, which is quite costly and considered obsolete due to the presence of three M.2 connectors. We will also drop the SIM card reader and one of the two EPROMs, as we only need one.

Due to the unknown amount of work required, the cost of the activities to be carried out by the new company cannot be estimated. On top of that we plan to make new, hopefully final, prototypes that should cost around 1500 euros each plus around 2000 euros for setting up the prototype production plant.

Campaign Change and Upgrade.

We particularly thank to all recurring donors that keep a constant contribution allowing us to keep the project ongoing.

We have updated the current donation campaign, postponing the heat pipe redesign for a later stage, and refocused on supporting the required work to make the Powerboard Tyche function correctly.

To reach the new goal, we need to pay a new hardware designer that will help us understand what is wrong with the current motherboard prototypes, potentially leading to a partial electronic redesign. We need to produce a new prototype with mechanical fixes, ensuring the correct placement of the board inside the chassis and some connector placement adjustments. Additionally, we plan to drop the SATA3 chipset, the SIM card reader, and the unnecessary additional EPROM.

In addition, we still have to pay the firmware engineer, who was fundamental in making progress in 2024. Without his strong work in fixing and comparing signals between the NXP T2080-based DevKit and our motherboard prototypes, and his continuous feedback to the hardware designer, the needed fixes on the CPLD (Lattice LCMXO640C-3TN100C FPGA) would not be possible.

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Call for a Scientific & Technical Committee

We are setting up in our not-for-profit association a Scientific & Technical Committee that, for example, will provide solutions for our Open Hardware project, examine other Open Hardware projects, adopt other OpenISA CPU, and develop additional Open Hardware Notebook design. Anyone of the associated member of the Power Progress Community will be able to join this committee.

By establishing this committee, we intend to make our association and our PPC Community a suitable place allowing the personal and social development, sharing the motto “Knowledge in solidarity and to be in service of liberation from conditions of constraint and oppression and for freedom of choice”.

Call for developers

We ask any capable developer to increase the number of software supporting PowerPC 64 bit platform (aka PPC64) as the target architecture. In particular, we welcome anyone willing to introduce support for the big-endian variant of the PPC64 architecture, the only one supported by the NXP T2080 CPU that we selected for out PowerPC notebook.

We are currently revising our GitLab based repositories that we setup during the last years while trying to add support to the PPC64 platform. We invite existing and new collaborators to identify potential libraries and GNU/Linux applications to which they are willing to work on, even adding support to a small piece of software may allow bigger application to start working on PPC64 architecture, do not underestimate what even a small contribution may achieve in a bigger picture.

More software working on PPC64, means a better chance for our Powerboard Tyche notebook to become a useful piece of hardware for a bigger number of people, making it an appealing alternative for a broader community.

In case you want to help out on any kind of software stack, please contact us or fill our collaboration survey. In case you are already a contributing volunteer to any existing open source software development, adding support for the big endian PPC64 platform is more than welcome.

If you do not have direct access to a physical PPC64 hardware platform, we can provide you access to our IBM Power9 based environment that is kindly provided by OSU Open Source Lab that we thanks so much for their support.