New Powerboard Tyche Desktop design Faster then Ever!

Posted on August 31, 2025 by Communications Team

To complete the schematics design, the designer will need around another two weeks.
From the beginning of August we already have in our hands a large part of the new design (Desktop version of Powerboard Tyche motherboard). We have started a fast review thanks to a few members of our association that were able to check the schematics. As usual in Italy, during August companies close for at least two weeks for vacations, so the designing is slowing down. For that reason, the PCB design will start after the middle of September.

We are proceeding faster than ever. We started the “Powerboard Tyche Desktop Electrical Schematics Design” donation campaign on 14th July, and the design itself started at the beginning of July. So after 1 month we already had a good part of the schematic done! Comparing that time with around 12 months that took the Notebook schematics design, now we are proceeding more than 4 times faster!!!

Thanks to the previous work done, our previous design and experience doing Powerboard Tyche Notebook designs and prototypes, the designer can realize the Desktop Design faster, integrating the NXP T2080 RDB design (revision F – year 2023). That design is possible thanks to the 5400 euro of the dedicated Donation Campaign. The old donation campaign to design the Schematics of Powerboard Tyche Notebook was 12600 euro, so now we are spending less than half.

So every past effort and past donations for the Notebook version campaigns have been invaluable and permit us to speed up time and limit the cost to design the current Desktop version.

100.00% Raised

€4,120.00 donated of €4,120.00 goal

39 Donors

Campaign has ended

We remain absolutely committed to making an Open-Hardware Notebook-based PowerPC machine a reality. The desktop version will be the right step to allow more people, spending less money, to soon own, enjoy, and test software on this Desktop version. With a few changes and reintegrating the battery part of our previous Notebook, it will give rise to the Notebook version!

You can check our timeline from 2015 to 2025 and milestones of the project during the years.

NXP will review our Powerboard Tyche Desktop Electrical Schematics Design before we can publish it (completely or partially), as we have received from them Cadence source of the NXP T2080RDB (revision F – year 2023) that the designer has modified and partially integrated with our previous Notebook design (you can see our architectural study published even in the last post). We thank NXP for having provided us this source (revision F) that actually is not published. For that reason we need to have their agreement to publish, with an Open Hardware license, the parts that we take from their source. The Notebook version is published with a CERN Open Hardware license 1.2 version.

Hardware designers in NXP, as our old designer and the new one, use Cadence to design schematics, so that forces us to have the source in Cadence. We are not hardware designers.
The PCB design of the Notebook board was done in Mentor Expedition and the Desktop Design will be done in Mentor Pads.

As we did with our Powerboard Tyche Notebook design, we will convert the Cadence and Mentor Pads sources to Altium and then to KiCad, hoping that the conversion to KiCad has been further improved and allows nothing to be lost.

For us, it is of fundamental importance that our board is Open Hardware (we will certify it as Open Hardware with OSHWA when it will be completely functional) and the prototypes are realized thanks to your support and donations.

The process required to achieve a fully compliant Open Hardware motherboard was carefully analyzed by students of the Law and Policy Clinic of New York University School of Law (in 2019). Thanks to their work, we clearly understood the practical implications of the requirements for the OSHWA Open Hardware certification, and we cross-checked our approach and adopted solutions with OSHWA personnel. An important part of being considered Open Hardware compliant (OSHWA Open Hardware certification) requires that everything that is under our control and used to produce our motherboard should be publicly disclosed, such as schematics, PCB, Gerber-files and all their accompanying information. As a consequence, most of the datasheets of the chips used in our schematics are freely downloadable, as well as the schematics and the PCB design. In case some of the chip vendors ask us to remove technical details that we were not supposed to disclose, we will comply with their requests by removing the published material, but that will not impact our compliance with OSHWA Open Hardware certification, because we can demonstrate that we strived to be as open as possible.

What’s more, we thank NXP for reviewing our design. We had to fill a deep questionnaire that permits them to go deeper into the review. This is an added value that NXP gives to our board: they use their time and resources for us, and we are grateful for that.
In the worst case, they will ask us to mask some parts of the source that are copied from their design. That is the reason why, before publishing the schematics sources, we need to complete it and wait for their review. In this way, we have sped up the design process; we are going on with our design phases without waiting for NXP review. The review only delays the moment in which we start publishing the open source designs.

We are searching for volunteers that would like to improve our Open Hardware license and evaluate if it is better to use a newer CERN Open Hardware version than continuing with version 1.2.

What happens when the schematics design will be completed?
In the middle of September we should have in our hands the schematics design and the BOM that we will forward to the company that will make for us the PCB design and prototype production.
This manufacturer company is already booked and ready for the middle of September to carry out these activities for us. The first feedback that this company will give to us will be the cost estimation to design the PCB and to produce our Desktop prototypes, so at the same moment we will be able to inform everyone about the costs of each phase (PCB, prototypes).

Then they will start the PCB design (phase 2) and order the electronic components needed for the prototype production (phase 3).
After the prototype production, hardware and firmware testing will start (phase 4). With the CPLD itself, starting from the original CPLD source code of T2080 RDB, our Powerboard Tyche Desktop CPLD will be programmed.
As the components and firmware to boot up the board are the same as the T2080 RDB, we can count on a robust boot up.
If more work is needed to improve the CPLD code, it will be done thanks to the same firmware engineer that helped us fix the CPLD firmware of our Notebook prototype, and in that case we will evaluate the cost (phase 4 bis).

Yes, it’s possible to reach the goal to have a working Powerboard Tyche Desktop before the end of 2025, but is needed an extraordinary effort from donors because we depend on donations to cover all the steps that are coming : Schematics Design, PCB Design, Prototype Production and Tests.

100.00% Raised

€4,120.00 donated of €4,120.00 goal

39 Donors

Campaign has ended

Desktop Electrical Schematics Ready! in August.25

Posted on July 15, 2025 by Communications Team

We are very happy to inform you that the Schematics Design of our new Powerboard Tyche Desktop is running fast thanks to the new Designer and to the NXP Devkit source design plus our Powerboard Tyche Notebook design. Designer took from the NXP Devkit design ( 2023 version) everything is related to the boot process and many parts from our Notebook design, except what is not needed for the Desktop version, like the Battery part.

You can check all the details regarding what we took from Devkit design and what we took from our Powerboard Tyche Notebook design.

At the end of July, we will provide the schematic design and the BOM to the factory, which will then begin the PCB design based on the schematics. Therefore, by the beginning of August (before the factory’s holiday closure), we will know the cost for the PCB design and prototype production. New donation campaigns will then start for PCB design and prototype production.

Today, July 14th, 2025, we’ve officially launched the donation campaign for the schematics. Before the end of July, we’ll make the down payment for the schematics design. We already have funds collected from the previous donation campaign for the CE certification (of the Powerboard Tyche Notebook), so we can advance money from that fund. However, it’s crucial to boost this new campaign and encourage everyone to donate so we can use fresh funds specifically for the schematics design.

SPECS

Form Facttor: Micro ATX
CPU: NXP T2080, e6500 64-bit Power Architecture with Altivec technology
- 4 x e6500 dual-threaded cores, low-latency backside 2MB L2 cache, 16GFLOPS x core
RAM: 2 x DDR3 Slots
VIDEO
- PCIE3 x16 VIDEO Card 1
- PCIE2 x4 VIDEO Card 2
AUDIO: C-Media 8828 sound chip, audio IN and audio OUT jacks
USB: 3.0 and 2.0 ports
STORAGE:
- NVM Express (NVMe)
- 2 x SATA2
- 1 x SDHC card reader
NETWORK:
- 2 x Gigabit ethernet RJ-45 connector

100.00% Raised

€4,120.00 donated of €4,120.00 goal

39 Donors

Campaign has ended

Starting from today (July 14th 2025) you can make your donation, thanks!

Milestones

Phase 1: Actual Campaign Schematics Design : goal 30.07.2025

Phase 2: PCB Design : goal 30.09.2025 [depending on donations collected]

Phase 3: Prototypes Production: goal 30.10.2025 [depending on donations collected]

Phase 4: Prototypes Tests. : goal 30.11.2025 [depending on donations collected]

The milestone phases depend from your donation. Thanks!

We remain absolutely committed to making an Open-Hardware Notebook-based PowerPC machine a reality.

As we have already published on our past post we have changed the tactic, focusing on a desktop board first allows us to concentrate on getting the core computing platform stable and functional, tackling the complexities of a laptop form factor (like power management, screen integration, etc.) in a later stage if needed. This is a pragmatic step to ensure we achieve a tangible outcome by our 2025 target. What’s more the Powerboard Tyche Desktop version will be more cheaper than the Notebook version!

We value the experience of making our Open Hardware Powerboard Tyche based on PowerPC from scratch; this is possible thanks to the support of all donors and supporters, and the time and creativity of the activists who have been involved in this project over the years.

We ask you to share every-ware this call for support a strong flow of donations to cross the finish line of all donation campaigns to arrive by 2025 with produced, tested and functioning prototypes!

Strategic Change: By 2025, let’s do whatever It Takes to achieve at Least a desktop version!

Posted on May 4, 2025 by Communications Team

Hello everyone, we know it’s been quite some time since our last update on November 21, 2024.

We really appreciate your patience! Despite the silence on our end, we’ve seen that our incredible community – both old friends and new supporters – have continued to donate continuously. An infinite thanks to all of you, our amazing current, past, and future donors! Your unwavering support truly fuels our efforts and keeps the dream alive.

Short story

As we shared in our last post, the work with the previous designer hit a significant hurdle: we just couldn’t get the board to reach the crucial boot stage.

This led us on a search for a new designer, someone with specific skills and experience with PowerPC architecture. We were really pleased to find a talented new designer who was available from the beginning of 2025, who can even rely on an additional person who is an expert in firmware programming. Following our plan, we used January and February to make the big move, getting all the equipment transferred over to this new designer’s team.

We held off on publishing updates because, honestly, we were waiting for that breakthrough moment – the good news we could finally share with all of you. As things were showing quite promising (e.g. improved CPU signals outputs), we had high hopes that this new collaboration would quickly move us past the booting issues. In parallel, we also tried improving U-Boot and led an additional T2080RDB, the development board that was kindly provided by NXP, to one of our collaborators, but due to personal health problems, he can no longer contribute to the project.

Our work with the new designer has been focused on rigorous testing. On April 9th, we saw that the board’s behavior was frustratingly similar to the devkit – it still wasn’t booting. This prompted a dedicated session on April 14th for one last intensive attempt to find the root cause. As part of this deep dive, we de-soldered the Marvell chip, which is the SATA3 controller.

Marvell 88SE9235A1-NAA2C000 Sata 3 chip removal to test Powerboard Tyche

Removing this component was actually something we had already planned to do for the upcoming prototype version as we streamline the design. To help isolate the issue even further, we also de-soldered the Pericom chip.

removal Pericom 6-port, 12-lane, PCIe 2.0 Packet Switch PI7C9X2G612GP

The overall outcome? Despite taking these significant steps, the board still did not boot. It exhibited exactly the same behavior. We were, frankly, quite upset and left without words.

It’s incredibly challenging when you put in the effort, try to simplify things, and the core problem persists. So far, we have spent around 6000 Euros with the newly hired hardware designer, and even if things have improved, showing the expected NXP documented behaviors of the NXP reference development board, after two years with the prototype motherboards in our hands, we still are not able to boot it.

Pages: 1 2

Major improvements for Powerboard Tyche despite adversity, but there is still work to be done

Posted on November 21, 2024 by Communications Team

Photo by **mohamed_hassan** from **PxHer e**

The hardware designer who created our Powerboard Tyche worked between April and July on one of the three prototypes, focusing on fixing the board firmware. These fixes required a series of checks to determine if any additional adjustments were needed for the board itself, and a complete analysis of electronic signals was performed. This analysis was provided later in September. The same fixes were applied to the second prototype (we have three prototypes).

u-boot 2018.11 enabled AMD video cards

Additionally, Max Tretene from ACube Systems was hard at work on our NXP T2080-based DevKit and completed a newer version of U-Boot in May, which finally enabled graphical output on AMD Radeon video cards during booting. You can find the updated source code on our GitLab. Below you can see the new U-Boot in action booting up the NXP T2080-based DevKit.

Below is a photo showing the Powerboard Tyche during an electronic test session conducted last August.

In August, the hardware designer sent back two prototypes to our firmware engineer. ACube Systems purchased an oscilloscope to continue analyzing signals on the prototypes, since the oscilloscope previously used by the firmware engineer was on loan.

In September, signal analysis using the oscilloscopes began, comparing the NXP T2080-based DevKit and our Powerboard Tyche to identify differences. Many differences were found in the power-up sequences, so we asked the hardware designer to fix the CPLD program responsible for governing the signals.

Below is a picture of the expected power-up signals as explained in the T2080 Manual.

Below is picture showing the signals from the Powerboard Tyche last August, a picture extracted from the Test Report provided by the hardware designer.

As you can see above there is some difference of PORESET_B and HRESET_B between what was found during the hardware tests on pur board and what is expected in the NXP manuals.

In September, a new series of tests were performed. Below are two pictures from the oscilloscope showing the output of different attempts while reprogramming the CPLD of the Powerboard Tyche.

As we can see on the screenshot even the tension of 2,51 volt was wrong, as it should be not more than 2 volt.

During September and October, there were many reprogramming cycles of the CPLD. Each time, the hardware designer recompiled the HDL of our CPLD and sent it to our firmware engineer, who had two prototypes in hand. Reprogramming the prototypes was quite slow, as neither the hardware designer nor the firmware engineer were working full-time in our project. We sent one prototype back to the hardware designer, and by the end of October, he had completed the CPLD updates. At the end of this hard work the CPLD finally generates the expected power-up signals, reproducing the same signals generated during power-up of the NXP T2080-based DevKit.

The final version of the CPLD firmware (published on GitLab) modifies the behavior of the two signals PORESET (yellow) and HRESET. Indeed, the oscilloscope shows that the two signals now behave differently compared to previous versions.

By the end of October, the signals on the Powerboard Tyche finally looked correct (picture below)

As you can see the now the tension is correct, around 1,95v, in August was 2,51v

Unfortunately, the changes to the CPLD did not resolve the boot-up process of the entire board.

Strangely enough, during tests we found differences in the power-up behavior between two of the prototype boards: one in the hands of the firmware engineer (FE) and the other in the hands of the hardware designer (HE). Here are the three differences we found:

On the HE board, the ASLEEP LED stays off if the SD card with U-Boot is inserted and lights up if it is not inserted.
On the FE board, the ASLEEP LED always stays on, regardless of whether an SD card is inserted or not.
On the HE board, the oscilloscope shows activity on the SD signals, while on the FE borrowed, there is no activity at all.

We are investigating the possible causes of this different behaviors, such as a potentially different patches. We have sent the third prototype, which was in the hands of Roberto Innocenti during the presentation in October-November 2023, back to the hardware designer to verify its behavior.

Differences were also found while performing the usual test with our JTAG debugger, where we encountered some unusual and strange characters in the output.

New Partners to reach the goal

Due to the significant latency and unreliability of the original hardware designer, we are now forced to find other partners to reach our goal of having the motherboard ready for production in 2025. We started the process of searching for a new company in August, and finally, in November, we found a new highly skilled Italian company for prototype production. This company has decades of experience and a new hardware designer with experience in PowerPC design, which is a great accomplishment for us since such expertise is becoming increasingly rare.

In the transition from one company to another, we are now facing some additional work because the current PCB design is based on Mentor Expedition software (a software now acquired by Siemens), while the new hardware designer uses the Orcad software. Fortunately, we have previously worked on such a task and have already attempted the conversion to Altium software. However, we will need to perform the conversion with greater care to ensure that all components are completely and correctly exported.

The past work on the mechanical aspects of the PCB to fit it into the Slimbook chassis was performed by a previous company that unfortunately generated some dimensioning errors in our existing prototypes therefore the new company has to fix also these problems.

Even if this new company was already known as it successfully worked with ACube System in the past, it was not previously selected for working on the laptop because of its somewhat higher cost. So at this point we are left with no choice but to entrust the job to them if we really want to find out what’s wrong with the board.

Required changes to the motherboard

We have already had the opportunity to explain the history of the board to the new company and to the new hardware designer and requested their investigation into the possible causes preventing the board from booting up. We agreed on a complete and in-depth analysis of the entire pre-boot process of the board. Based on their checks, we may need to implement further patches or introduce additional changes to the electronic design as a worst-case scenario.

The new hardware designer , obviously had other projects running before starting ours and will be able to start working on our board by January 2025.

In addition to potential electronic fixes, we have already planned some hardware changes as stated in a previous post (link). The goal is to make new prototypes with changes that will lower the overall cost and to do so, we will drop the SATA3 chipset, which is quite costly and considered obsolete due to the presence of three M.2 connectors. We will also drop the SIM card reader and one of the two EPROMs, as we only need one.

Due to the unknown amount of work required, the cost of the activities to be carried out by the new company cannot be estimated. On top of that we plan to make new, hopefully final, prototypes that should cost around 1500 euros each plus around 2000 euros for setting up the prototype production plant.

Campaign Change and Upgrade.

We particularly thank to all recurring donors that keep a constant contribution allowing us to keep the project ongoing.

We have updated the current donation campaign, postponing the heat pipe redesign for a later stage, and refocused on supporting the required work to make the Powerboard Tyche function correctly.

To reach the new goal, we need to pay a new hardware designer that will help us understand what is wrong with the current motherboard prototypes, potentially leading to a partial electronic redesign. We need to produce a new prototype with mechanical fixes, ensuring the correct placement of the board inside the chassis and some connector placement adjustments. Additionally, we plan to drop the SATA3 chipset, the SIM card reader, and the unnecessary additional EPROM.

In addition, we still have to pay the firmware engineer, who was fundamental in making progress in 2024. Without his strong work in fixing and comparing signals between the NXP T2080-based DevKit and our motherboard prototypes, and his continuous feedback to the hardware designer, the needed fixes on the CPLD (Lattice LCMXO640C-3TN100C FPGA) would not be possible.

100.00% Raised

€14,000.00 donated of €14,000.00 goal

65 Donors

Campaign has ended

Call for a Scientific & Technical Committee

We are setting up in our not-for-profit association a Scientific & Technical Committee that, for example, will provide solutions for our Open Hardware project, examine other Open Hardware projects, adopt other OpenISA CPU, and develop additional Open Hardware Notebook design. Anyone of the associated member of the Power Progress Community will be able to join this committee.

By establishing this committee, we intend to make our association and our PPC Community a suitable place allowing the personal and social development, sharing the motto “Knowledge in solidarity and to be in service of liberation from conditions of constraint and oppression and for freedom of choice”.

Call for developers

We ask any capable developer to increase the number of software supporting PowerPC 64 bit platform (aka PPC64) as the target architecture. In particular, we welcome anyone willing to introduce support for the big-endian variant of the PPC64 architecture, the only one supported by the NXP T2080 CPU that we selected for out PowerPC notebook.

We are currently revising our GitLab based repositories that we setup during the last years while trying to add support to the PPC64 platform. We invite existing and new collaborators to identify potential libraries and GNU/Linux applications to which they are willing to work on, even adding support to a small piece of software may allow bigger application to start working on PPC64 architecture, do not underestimate what even a small contribution may achieve in a bigger picture.

More software working on PPC64, means a better chance for our Powerboard Tyche notebook to become a useful piece of hardware for a bigger number of people, making it an appealing alternative for a broader community.

In case you want to help out on any kind of software stack, please contact us or fill our collaboration survey. In case you are already a contributing volunteer to any existing open source software development, adding support for the big endian PPC64 platform is more than welcome.

If you do not have direct access to a physical PPC64 hardware platform, we can provide you access to our IBM Power9 based environment that is kindly provided by OSU Open Source Lab that we thanks so much for their support.

Spring restart

Posted on April 4, 2024 by Communications Team

Winter was an hibernation period for what it concerns issues preventing the booting of our Powerboard Tyche. A number of unfortunate contributing factors caused our paid engineers to be unable to work for us. Notice that they are paid for a fraction of a full-time engineer but, they are passionate about the common goal and they are working during week-ends and their spare time. Personal reasons did not put them in a position to works during winter on u-boot . On the positive side, we had more time to receive donations to cover their work. In fact, up to now we were using funds collected to pay for the CE certification for our two paid collaborators, but thanks to the new fundings coming from your donations, we have now a more or less balanced budget.

We particularly thank to all recurring donors that keep a constant contribution allowing us to keep the project ongoing.

We discovered that our online donation system did not work properly, and some of you kindly warned us. We were totally unaware that such a problem existed, and we were unable to track down when it first appeared. The problem preventing users to enter the amount of money they want to donate is now solved, so please, if any of you tried in the past, please, you may now proceed contributing to the project. Do not hesitate contacting us if you face any problems.

100.00% Raised

€14,000.00 donated of €14,000.00 goal

65 Donors

Campaign has ended

U-Boot development

The cost faced up to now for developing U-Boot for a better support of the T2080 CPU, reached around 3000 euros, while the cost for the jtag hardware debugger was around 700 euros. On the other side, donations for the current campaign reached 3600 euros. So, to keep up with upcoming costs for developing U-Boot further, the hardware debugging process, and the required board electronic design changes, some additional funding is required.

https://gitlab.com/power-progress-community/oshw-powerpc-notebook/u-boot/-/merge_requests/1

Struggling to identify what prevent the board from booting

The hardware engineer that designed and made the PowerBoard Tyche prototypes for us was busy during the entire winter season, as he was working in other PowerPC related hardware project for A-Cube (see A-EON A1222). Starting from April 2024, the work on our prototypes will restart. This work will focus on identifying and solving the problems preventing the board from booting.

As you may know, our not-for-profit association is made of volunteer hobbyists, and like you, we are all looking forward to put our hands on a working PowerPC notebook. No one (donors and volunteers collaborators), have a big amount of funds to allocate to face the problems that are arising along this project. As a consequence, we have quite a limited capacity for action. As an example, we cannot afford full-time professionals working 100% of their time on solving issues. We should go with the availability of professionals that shares our goal and are willing to dedicate some of their time and settle for a quite a modest salary.

We are exhausted by the constant delays we are facing, delays that we could not foresee, and neither we are able to eradicate. Just image how we feel having the physical prototypes in our hands since December 2022, and being unable to even booting them up. We are so grateful to Max Tretene from ACube-Systems that last autumn tried everything possible from the firmware point-of-view to boot the board. Unfortunately, neither Max nor us were able to extract anything meaningful from the messages coming out of the serial port appearing in the JTAG debugger when trying to boot the board, messages that we never encountered in any tests we performed on the T2080 Developer kit from NXP. As all other paid collaborators have performed all conceivable tests to solve the boot problem, together with ACube Systems we decided to ask the original engineer that designed and made these boards to identify and solve the issue we are facing. We really hope that a solution will be found as soon as possible.

Another NXP T2080RDB devkit for developing U-Boot

Thanks to the kind contribution of NXP, we are able to provide Bas Vermeulen, our Dutch developer working on U-Boot, a NXP T2080RDB devkit. With the direct access to a hardware based on the very same CPU adopted for our PowerPC based notebook, we all hope that Bas will be in a better position to fix problems and extend the support to the T2080 CPU in U-Boot and also provide better support to AMD based video drivers, allowing a graphical output at boot time. To make a more suitable environment setup for Bas, he also fit an AMD RX 550 video card in the devkit, a perfect environment that greatly facilitate his precious work.