To complete the schematics design, the designer will need around another two weeks.
From the beginning of August we already have in our hands a large part of the new design (Desktop version of Powerboard Tyche motherboard). We have started a fast review thanks to a few members of our association that were able to check the schematics. As usual in Italy, during August companies close for at least two weeks for vacations, so the designing is slowing down. For that reason, the PCB design will start after the middle of September.

We are proceeding faster than ever. We started the “Powerboard Tyche Desktop Electrical Schematics Design” donation campaign on 14th July, and the design itself started at the beginning of July. So after 1 month we already had a good part of the schematic done! Comparing that time with around 12 months that took the Notebook schematics design, now we are proceeding more than 4 times faster!!!

Thanks to the previous work done, our previous design and experience doing Powerboard Tyche Notebook designs and prototypes, the designer can realize the Desktop Design faster, integrating the NXP T2080 RDB design (revision F – year 2023). That design is possible thanks to the 5400 euro of the dedicated Donation Campaign. The old donation campaign to design the Schematics of Powerboard Tyche Notebook was 12600 euro, so now we are spending less than half.

So every past effort and past donations for the Notebook version campaigns have been invaluable and permit us to speed up time and limit the cost to design the current Desktop version.

We remain absolutely committed to making an Open-Hardware Notebook-based PowerPC machine a reality. The desktop version will be the right step to allow more people, spending less money, to soon own, enjoy, and test software on this Desktop version. With a few changes and reintegrating the battery part of our previous Notebook, it will give rise to the Notebook version!

You can check our timeline from 2015 to 2025 and milestones of the project during the years.

NXP will review our Powerboard Tyche Desktop Electrical Schematics Design before we can publish it (completely or partially), as we have received from them Cadence source of the NXP T2080RDB (revision F – year 2023) that the designer has modified and partially integrated with our previous Notebook design (you can see our architectural study published even in the last post). We thank NXP for having provided us this source (revision F) that actually is not published. For that reason we need to have their agreement to publish, with an Open Hardware license, the parts that we take from their source. The Notebook version is published with a CERN Open Hardware license 1.2 version.

Hardware designers in NXP, as our old designer and the new one, use Cadence to design schematics, so that forces us to have the source in Cadence. We are not hardware designers.
The PCB design of the Notebook board was done in Mentor Expedition and the Desktop Design will be done in Mentor Pads.

As we did with our Powerboard Tyche Notebook design, we will convert the Cadence and Mentor Pads sources to Altium and then to KiCad, hoping that the conversion to KiCad has been further improved and allows nothing to be lost.

For us, it is of fundamental importance that our board is Open Hardware (we will certify it as Open Hardware with OSHWA when it will be completely functional) and the prototypes are realized thanks to your support and donations.

The process required to achieve a fully compliant Open Hardware motherboard was carefully analyzed by students of the Law and Policy Clinic of New York University School of Law (in 2019). Thanks to their work, we clearly understood the practical implications of the requirements for the OSHWA Open Hardware certification, and we cross-checked our approach and adopted solutions with OSHWA personnel. An important part of being considered Open Hardware compliant (OSHWA Open Hardware certification) requires that everything that is under our control and used to produce our motherboard should be publicly disclosed, such as schematics, PCB, Gerber-files and all their accompanying information. As a consequence, most of the datasheets of the chips used in our schematics are freely downloadable, as well as the schematics and the PCB design. In case some of the chip vendors ask us to remove technical details that we were not supposed to disclose, we will comply with their requests by removing the published material, but that will not impact our compliance with OSHWA Open Hardware certification, because we can demonstrate that we strived to be as open as possible.

What’s more, we thank NXP for reviewing our design. We had to fill a deep questionnaire that permits them to go deeper into the review. This is an added value that NXP gives to our board: they use their time and resources for us, and we are grateful for that.
In the worst case, they will ask us to mask some parts of the source that are copied from their design. That is the reason why, before publishing the schematics sources, we need to complete it and wait for their review. In this way, we have sped up the design process; we are going on with our design phases without waiting for NXP review. The review only delays the moment in which we start publishing the open source designs.

We are searching for volunteers that would like to improve our Open Hardware license and evaluate if it is better to use a newer CERN Open Hardware version than continuing with version 1.2.

What happens when the schematics design will be completed?
In the middle of September we should have in our hands the schematics design and the BOM that we will forward to the company that will make for us the PCB design and prototype production.
This manufacturer company is already booked and ready for the middle of September to carry out these activities for us. The first feedback that this company will give to us will be the cost estimation to design the PCB and to produce our Desktop prototypes, so at the same moment we will be able to inform everyone about the costs of each phase (PCB, prototypes).

Then they will start the PCB design (phase 2) and order the electronic components needed for the prototype production (phase 3).
After the prototype production, hardware and firmware testing will start (phase 4). With the CPLD itself, starting from the original CPLD source code of T2080 RDB, our Powerboard Tyche Desktop CPLD will be programmed.
As the components and firmware to boot up the board are the same as the T2080 RDB, we can count on a robust boot up.
If more work is needed to improve the CPLD code, it will be done thanks to the same firmware engineer that helped us fix the CPLD firmware of our Notebook prototype, and in that case we will evaluate the cost (phase 4 bis).

Yes, it’s possible to reach the goal to have a working Powerboard Tyche Desktop before the end of 2025, but is needed an extraordinary effort from donors because we depend on donations to cover all the steps that are coming : Schematics Design, PCB Design, Prototype Production and Tests.