Video: our Speak at OpenPOWER Summit NA 15 Sept 2020

On 15th September 2020 at OpenPOWER Summit NA, there was many interesting speaks and projects, our speak

Around 6 years back, we started as a group of FOSS, PowerPC and Open Hardware enthusiasts, with beginning to work on PowerPC Notebook project which was designed around GNU/Linux using Open Hardware. We had very limited funding with limited skills to work. But our enthusiasm and motivation led us to reach fabrication stage for the motherboard. Finally this year we could successfully design its PCB with the help of collaborators and limited funding from donors. There were many challenges faced in this process. Since PowerPC processors have been around for more than 2 decades, but the current implementation on Notebook was difficult to take in the market. Coming to the performance in Big Endian mode is maximized in this with many software need to be patched. In future we plan to upgrade our PCB design to the more recent packaging technology for the processor. Also, with increasing collaborators, it would be possible to design more smaller and cheaper PowerPC board.

Our Speech at Open Source Summit. 15 days to donate 2600 euro left.

Our PPC64 Motherboard Board Design

The tentative deadline for Phase1B is 18th November so there are two weeks left to donate the remaining 2600 euros. If we will reach the goal, the PCB with SI bus simulation should be ready by the middle of December.

In this case in before the end of 2020 we start working on production of the Prototypes together with the Prototypes Donation Campaign.

We have to give a name to the motherboard, suggestions still remain open few days more on our forum.

Our Open Hardware license and endianness suggestions at OSS 2020

We have talked about Cern Open Hardware License and Endianness at Open Source Summit + Embedded Linux Conference on Europe 27 Oct 2020

Cern Open Hardware License

Why not a software license such as GPL?
Hardware licenses are specific for hardware so they are written using the appropriate words: manufacturer, devices, CAD tool…

Why we choose the CERN Open Hardware Licence v1.2?
We think it offers a better protection for the licensor compared to other hw licenses such as TAPR Open Hardware License

So, who are the licensor and the licensee?
– In our project we (Power Progress Community) are the licensor and the licensee is the hardware producer.
The Licensee may manufacture or distribute Products
– Licensee could modify our work but the modification must be available under the same or equivalent license.
Licensor is protected
– Quality and responsabilities of the hardware belong to the licensee.

Other important notes
– Firmware, drivers and any other software would require their own license.
– Intellectual property belongs to the licensor.
– Documentation must be provided in the right format to be modified (using a CAD tool).

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Eureka! Here we have the Board layout! 15 days to donate 3660 euro left.

We are happy to share to all the donors and followers the Board Layout of our PPC64 Notebook Motherboard!!!

The design of our board layout is meant to fit inside the Slimbook Eclipse body. The PCB Design which is currently being worked on using Mentor Xpedition.

In September 2020 we have published on our gitlab repository the Orcad source file with the latest version (v0.6) of the Electrical Schematics, you can go more deep on these board layout starting from the Orcad source.

Open Hardware PowerPC Notebook Board Layout for Slimbook Eclipse Body – TOP
Open Hardware PowerPC Notebook Board Layout for Slimbook Eclipse Body – BOTTOM

The tentative deadline for Phase1B is 2th November so there are two weeks left to donate the remaining 3660 euros. If we will reach the goal, the PCB with SI bus simulation should be ready by the end of November.

In this case in December 2020 we will work on production of the Prototypes together with the Prototypes Donation Campaign.

We have to give a name to the motherboard, suggestions still remain open few days more on our forum

Orcad source of Electrical Schematic v0.6 published and other news

Finally we have published on our gitlab repository the Orcad source file with the latest version (v0.6) of the Electrical Schematics.

This file is at base of the PCB Design which is currently being worked on using Mentor Xpedition. The previous version of the schematics required some updates in order to accommodate minor changes to match the Slimbook chassis internal spaces. In addition, the schematics are now compatible with the I/O expansion board and the position of the external ports found on the “Elipse” chassis model, that was kindly provided by Slimbook.

After achieving the goal of Phase 1A (thank you all!!), we have just started Phase 1B of the donation campaign targeting the “Fast SI bus simulations”, in other words, an in-depth analysis of the integrity of signals of the PCB that came out from the previous campaign.

After discussing with the engineers currently working on the PCB, we were told that publishing an incomplete and potentially buggy PCB does not have much sense, as there might be major problems that will be solved after carrying out the SI bus simulations. At the end of these long discussions, we agreed on publishing the PCB only after reaching the end of Phase 1B, when all checks will be done.

At this point we cannot fix a deadline for publishing the PCB, as the end of the work on the PCB largely depends on when we will reach the goal of Phase 1B donation campaign and when the SI simulation will help solve all electrical problems that may come up.

The tentative deadline for Phase1B is 16th October so there are two weeks left to donate the remaining 4000 euros (around 4700 USD). If we will reach the goal, the PCB with SI bus simulation should be ready by the end of November .

Open Source Summit + Embedded Linux Conference Europe 27 Oct 2020

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Signal Integrity Analysis of the PCB Design

On the 8th of September 2020 we have reached the previous goal targeting to collect the needed donations to complete the design our Open Hardware PCB (Printed circuit board), a big thanks to all supporters!

In the last 9 days, we received more than 2000 euros.
It allowed the campaign to reach its goal 7 days prior to its deadline, wonderful! Thank you all!

Gerd Altmann from Pixabay

This new campaign (Phase 1B) aims at the “Fast SI bus simulations”, in other words, it will pay for an in-depth analysis of the integrity of signals of the PCB that came out from the previous campaign. We have started the collection of donations right after reaching the 100% of the previous campaign.

The PCB Design , designed with Mentor Xpedition that came out from the previous campaign will be published here soon, a first public draft should be ready by the end of September.

After the in-depth analysis of the integrity of signals of the PCB will be performed, thanks to the current Donation Campaign, an updated version of the PCB will be published.

Our Speak at OpenPOWER Summit NA 15 Sept 2020

On 15th September at OpenPOWER Summit NA, there will be many interesting speaks and projects, our speak will be at 5:35pm ( Europe/Rome Time Zone).

Around 6 years back, we started as a group of FOSS, PowerPC and Open Hardware enthusiasts, with beginning to work on PowerPC Notebook project which was designed around GNU/Linux using Open Hardware. We had very limited funding with limited skills to work. But our enthusiasm and motivation led us to reach fabrication stage for the motherboard. Finally this year we could successfully design its PCB with the help of collaborators and limited funding from donors. There were many challenges faced in this process. Since PowerPC processors have been around for more than 2 decades, but the current implementation on Notebook was difficult to take in the market. Coming to the performance in Big Endian mode is maximized in this with many software need to be patched. In future we plan to upgrade our PCB design to the more recent packaging technology for the processor. Also, with increasing collaborators, it would be possible to design more smaller and cheaper PowerPC board.

15 days more to donate 2000 euro left for the PCB

Thanks to the donations already received, the work on the  PCB design can move forward and we estimate it could be completed by the End of September 2020. The date of publication of the PCB design will heavily depend on the results of the internal review process once we receive the first draft, hopefully it will not take long. The design of the PCB is meant to fit inside the Slimbook Eclipse body.

Picture by skeeze from Pixabay

As we were unable to reach the goal by August, we are forced to postpone the deadline of the current Donation Campaign (Phase 1A) to the 15th of September 2020

We kindly ask all followers, friends, and donors to concentrate their donations before the 15th September 2020, to ensure the end of Phase 1A to avoid an additional delay.

The plan is to deliver the PCB design with the end of Phase 1A, and right after that start Phase 1B “Fast SI bus simulations” on the 16th of September with a goal of € 5000 (around $ 5600). As a consequence, there will be no interruption in the donation campaign, it will transparently fade from Phase 1A to Phase 1B seamlessly.

August full activity in PCB Design

Picture of Albrecht Fietz da Pixabay

The PCB design is in progress even if August is a holiday season in Italy. ACube Systems was able to engage an engineering firm available to work in August to develop the PCB based on the electrical schematics, a pretty difficult task because everyone is on holiday at this time in Italy. 

In addition, Slimbook has provided us additional parts of the schematics useful for reviewing the connection of our motherboard design to the native Eclipse Expansion I/O Board. Resulting from these efforts, we can confirm our envisioned tentative schedule that set the delivery of the PCB design by the end of September 2020.

Interview with Riccardo Mottola, the main contributor to the ArcticFox web browser

In our PowerProgressCommunity association website we just published an interview with Riccardo Mottola, the most active developer contributing to the most advanced browser available for the PowerPC big endian platform

We have just published in our repo arcticfox 27.10.2(beta) compiled for PPC64

arcticfox 27.10.2(beta) PPC64 running on Debian PPC64 on G5

Freedesktop for Big Endian ported 350 package out of 470 to PPC64 big endian

Another step ahead on freedesktop-sdk on ppc64 big endian: libvpx and nss are gone. From 470 packages almost 350 are passed. Now the big challenge starts with ffmpeg, some sdl2 related component and mesa extension.

Suggest a Name for our PowerPC Notebook motherboard

Its time to give a name to our motherboard, we already have in our PPC forum few suggestions, please add yours.

Extended time for Donations

Thanks to the donations already received, the work on the  PCB design can move forward and we estimate it could be completed by the End of September 2020. The timing is somehow unfortunate, as August in Italy is time of vacation, nevertheless, we will do our best to avoid interruptions. The date of publication of the PCB design will heavily depend on the results of the internal review process once we receive the first draft, hopefully it will not take long. The design of the PCB is meant to fit inside the Slimbook Eclipse body.

Slimbook Eclipse Notebook
Slimbook Eclipse Notebook

As we were unable to reach the goal by July, we are forced to postpone the deadline of the current Donation Campaign (Phase 1A) to the 30th of August 2020

The plan is to deliver the PCB design with the end of Phase 1A, and right after that start Phase 1B “Fast SI bus simulations” on the 1st of September with a goal of € 5000 (around $ 5600). As a consequence, there will be no interruption in the donation campaign, it will transparently fade from Phase 1A to Phase 1B seamlessly.

We kindly ask all followers, friends, and donors to concentrate their donations before the 30th August 2020, to ensure the end of Phase 1A to avoid an additional delay.

Our PPC64 Big Endian Patches

Flatpak binary is running on Debian 10 PPC64 Big Endian but need the Freedesktop layer to prepare the flatpak packages strating from hundreds of manifests.

Freedesktop stripper now it’s patched for cross-endian check (ppc64 branch) . We thanks Flatpak team for the gentle collaboration and helpful guidelines.

After importing bootstrap on a native ppc64be, the build process stops on package https://github.com/google/boringssl.git it doesn’t have ppc64 support, “magic” debian repo solve a lot of problems related to dep…back on track on porting!

sudo apt-get install python3-grpcio libgirepository1.0-dev python3-cairo-dev libcairo2-dev gir1.2-ostree-1.0 python3-gi gyp node-gyp lzip locales-all

pip install BuildStream
pip install git+https://gitlab.com/buildstream/bst-external
pip install cython
pip install ostree
pip install PyGObject
pip install vext.gi

Once copied the bootstrap to target, rename bootstrap/powerpc64 to bootstrap/current
Execute these commands to compile:

export XDG_CACHE_HOME=<path/to/build/dir>
make IMPORT_BOOTSTRAP=true

MintPPC running on the T2080RDB Devkit

We are in close contact with Jeroen, the creator of the Debian based MintPPC distro (see a post about the new 2020 version of MintPPC here). We have successfully tested it on our T2080RDB Devkit that has the same NXP T2080 cpu of our laptop project (64bit, 4 cores, 8 logical core, up to 1.8Ghz).

MintPPC running on the T2080 Devkit, which is based on the NXP T2080 CPU.
MintPPC running on G5

LibreSOC updates

We very much like the work that our friends at Libre-SOC are currently doing. Our approach have multiple similarities as we both aim at supporting a similar effort in pushing Open Hardware further.
Below some update from their team.

Libre-SOC ran its first “hello world” little-endian binary a few weeks ago.  This shows us that Load, Store, Branch (and return) and many other POWER9 instructions are operational. With help from Florent of Enjoy-Digital.fr the next main task is to add Litex integration which will provide access to peripherals, both on FPGAs and in simulation.  At the same time, Jean-Paul from Sorbonne University has been helping with the layout of the 180nm test ASIC

If anyone would like to assist we have funding thanks to NLNet under their Privacy and Enhanced Trust Programme http://nlnet.nl/PET

Electrical Schematic v0.5 published

In the last PCB update post we mentioned that a new version V. 0.5 ( June 2020) of the electrical schematics is in the works. After a few rounds of internal reviews, that new version is now finally ready to be publicly shared.

We have published in our repository this new version of the schematics.

Our gitlab repository

Thanks to the project’s supporters  (here a list of donors) we reached 76% of the goal of the current step.