Why PowerPC?

This section is for people new to the PowerPC architecture (also called Power Architecture).
Though if you are an expert already you can enrich this page. Please send us information you want to be published here. Thank you.

 

The PowerPC architecture design is newer than the other successful CPU architectures:

X86 – year 1978

MIPS – year 1981

ARM – year 1983

PowerPC – year 1991

From the beginning PowerPC was designed with more features than other CPUs.

The Power Instruction Set Architecture is called Power ISA and is in continuous evolution.

Power Architecture (PowerPC) scales from embedded uses to Big Server Clusters.

Specs in short

  • 64-bit architecture with a proper 32-bit subset
  • Wide vector instructions with large register file allow efficient data moving without use of off-chip memory
  • RISC architecture introduces Superscalar concept of multiple execution units: Branch, Fixed Integer, Floating Point
  • AltiVec SIMD vector processing
  • ISA 2.04/2.05/2.06 support multicore/multithreading, virtualization, hypervisor and Power Management

Market Diversity

  • Automotive space from Powertrain, Body and Chassis, to Safety and Infotainment.
  • Compute – Volume server to the fastest and most resilient enterprise servers
  • Consumer – core technology for the innovative game consoles (X-Box 360, Wii, PS3)
  • High Performance Computing – Sequoia, the IBM BlueGene/Q system
  • Aerospace
  • Wired Communications
  • Wireless Communications

Altivec accelerator SIMD

  • AltiVec technology is a vector or single instruction multiple data (SIMD) architecture that allows the simultaneous processing of multiple data for floating point and integer items in parallel.
  • Developed 1996-1998 Standard from Power ISA 2.03
  • consists of thirty-two, 128-bit architectural registers and 16 additional vector rename registers.
  • The e6500 core includes a 16 GFLOPS AltiVec technology

Specs in deep (more info)

  • fixed 32-bit wide instructions to ease their decoding
  • load-store model, all operations are done within registers
  • large number of registers (32 general purpose registers and 32 floating point registers)
  • atomic (or exclusive) load-store instructions for use in a multicore context
  • big endian order with the possibility to work in little endian
  • 64-bit architecture with the behaviour of instructions specified for this mode
  • no specific role for general purpose registers (r1 used as the stack pointer is an ABI choice, not an architecture one)
  • MMU model not defined, it is implementation specific with globally 2 models for use in embedded devices or servers

 

Why PowerPC in the consumer field is adopted only for game consoles ?

CPU with many (proprietary) applications force to keep compatibility into next generation CPUs.

At the time the first PowerPC was built (1993) , all software was proprietary and all applications were written for x86 or Motorola 68k CPUs.

Thanks to Free Software now it’s possible to run the same programs and OS recompiled for PowerPC, so we are not forced anymore to use old CPU architecture.

Games console have a tiny OS with few embedded applications.
Games are written from scratch or are developed on cross-architecture engines. CPU change affects them less.

[to update]

 

16 thoughts on “Why PowerPC?

  1. A bigger question with PPC, does it ( the processor still stand up to, the intel models and clones of today?

    I will admit most of anything on an Windows machine ( side by side ) will fail compared to it’s PPC counter part, but the biggest issue is the drop of support for Tiger from devers, and programmers.

    So far my PPC machine ( at least when i had one ) is able to jump through hoops compared to any Intel, even the intel all-in-one machines are terrible compared to it’s PPC counter parts

  2. Look at the shortly released Amigaone X5000….It’s powered by a P5020 and P5040 e5500 core…It’s a high end computer targeted for games development and Multimedia…It is indeed not the fastest machine availabe in the computerworld, but doing its job quiet well…clean design and quality components makes it a good choice, not only in the Amigaworld..:-)

  3. I forgot to mention that, after the release of the forthcoming Amigaone 1222 (tabor) running a dualcore p1022 e500m core…the Amigaone TX is coming,
    featuring T4XXX e6500 core range of cpus…:-)

    • I guess the answer at the moment is that it is “plausible”, but not well understood if the sec acceleraror could be a similar issue as intel me could be, or not. i have not yet found anything else, but also have not necessarily ruled out any other/additional possibility.

  4. I’m surprised a project for a more open laptop would go for PowerPC and not consider OpenSparc or RISC V. Both OpenSparc and RISC V are open source and royalty free but I don’t believe this is completely the case with PowerPC??? With the full designs for OpenSparc and RISC V, you can prototype using a FPGA and run an ASIC when complete. Also, it seems like you’re implying that the Debian port of PPC is incompatible because of certain variations?

    Don’t get me wrong, this is an awesome project and I hope you succeed but it seems like you’re making things harder for yourself by choosing a less open and less produced CPU.

    If I’m wrong, I’d love to hear a rebuttal.

  5. Guilherme G. Piccoli

    Perhaps one of the most interesting properties of POWER nowadays (IMHO) was not mentioned here: the Open Source firmware stack, allowing a developer to have entire control (and customization capabilities) of the machine. The full FW stack is available on Open Power GitHub, and recently was discussed in last FOSDEM (https://lwn.net/Articles/715817 – “The POWER of open”).

    At least for me, this is one of the most relevant features that makes me want a PowerPC notebook.

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